Date of Award

August 2015

Degree Type

Thesis

Degree Name

Master of Science

Department

Engineering

First Advisor

Matthew E.H. Petering

Committee Members

Jaejin Jang, Wilkistar Otieno, Ichiro Suzuki

Keywords

Buffer Control, Cyclic Scheduling, Just-in-time, Simulated Annealing

Abstract

This thesis presents methods for efficiently controlling a buffer that is located between two non-synchronized manufacturing processes. Several machines with different cycle times and/or batch sizes perform each manufacturing process. The overall operation cycles every T time units. The first objective of the problem is to minimize the average buffer inventory level during one cycle. The second objective is to minimize the maximum inventory level observed at any point during the cycle. This new optimization problem has not been previously considered in the literature. An integer program is developed to model this problem. In addition, two heuristic methods—a simulated annealing algorithm and random algorithm—are devised for addressing this problem. Extensive experiments are conducted to compare the performance of four methods for attacking this problem: pure integer programming using the solver CPLEX; integer programming where CPLEX is initialized with a feasible solution; simulated annealing; and a random algorithm. The advantages and disadvantages of each method are discussed.

Available for download on Monday, August 28, 2017

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