Date of Award
December 2016
Degree Type
Thesis
Degree Name
Master of Science
Department
Engineering
First Advisor
Robert M. Cuzner
Committee Members
Adel Nasiri, Ryoichi S. Amano
Keywords
MVDC, Protection, Solid State Circuit Breaker
Abstract
Presently accepted approaches to protection are “Unit-Based” which means the power converter(s) feeding the bus coordinate with no-load electromechanical switches to isolate faulted portions of the bus. However, “Breaker-Based” approaches, which rely upon solid state circuit breakers for fault mitigation can result in higher reliability of power and potentially higher survivability. The inherent speed of operation of solid state protective devices will also play a role in fault isolation, hence reducing stress level on all system components. A comparison study is performed of protective device topologies that are suitable for shipboard distribution systems rated between 4kVdc and 20kVdc from the perspectives of size and number of passive components required to manage the commutation energy during sudden fault events and packaging scalability to higher current and voltage systems. The implementation assumes a multi-chip Silicon Carbide 10kV, 240A MOSFET/JBS diode module. A static fault simulator device is proposed to characterize DC faults.
Recommended Citation
Singh, Vikas, "Solid State Protective Device Topological Trade-offs for Mvdc Systems" (2016). Theses and Dissertations. 1416.
https://dc.uwm.edu/etd/1416